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copyright ? anpec electronics corp. rev. b.1 - apr., 2003 APA3541/4 www.anpec.com.tw 1 anpec reserves the right to make changes to improve reliability or manufacturability without notice, and advise customers to obtain the latest version of relevant information to verify before placing orders. class ab stereo headphone driver with mute ordering and marking information features the APA3541/4 is an integrated class ab stereo headphone driver contained in an so-8 or a dip-8 plastic package with mute feature . besides the com- mon mute feature , the APA3541/4 further integrates a voltage divider inside the chip . thus , the external resistors can be eliminated . the APA3541 has a fixed gain of 0db and the apa3544 has a fixed gain of 6db so that external gain setting is unnecessary. the de- vice is fabricated in a cmos process and has been primarily developed for portable digital audio appli- cations . ? ? ? ? ? high signal-to-noise ratio ? ? ? ? ? high slew rate ? ? ? ? ? low distortion ? ? ? ? ? large output voltage swing ? ? ? ? ? flexible mute function ? ? ? ? ? excellent power supply ripple rejection ? ? ? ? ? low power consumption ? ? ? ? ? short-circuit elimination ? ? ? ? ? wide temperature range ? ? ? ? ? no switch on/off clicks ? ? ? ? ? integrated voltage divider (v dd /2) to eliminate external resistors applications ? ? ? ? ? portable digital audio general description APA3541/4 package code j : pdip - 8 k : sop - 8 y : chip from temp. range i : - 40 to 85 c handling code tu : tube tr : tape & reel handling code temp. range package code APA3541/4 j : APA3541/4 xxxxx xxxxx - date code APA3541/4 k : APA3541/4 xxxxx xxxxx - date code free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 2 symbol parameter rating unit v dd supply voltage 7 v t sc(o) output short-circuit duration, at t a =25 c, p tot =1w 20 s t a operating ambient temperature range -40 to 85 c t j maximum junction temperature 150 c t stg storage temperature range -65 to +150 c t s soldering temperature,10 seconds 300 c v esd electrostatic discharge -3000 to 3000 *1 v pin name i/o function description out a o a channel output pin mute i chip disable control input, low active and high for normal operating input a i a channel input terminal v ss power ground pin input b i b channel input terminal bias i right channel bias input pin out b o b channel output pin v dd power input pin absolute maximum ratings note: 1. human body model : c=100pf, r=1500 ? , 3 positive pulses plus 3 negative pulses function pin description block diagram input b out b bias mute out a input a bias + a b + 1 2 3 4 v ss 5 6 7 8 v dd mute 0db (6db) 0db (6db) 180k ? ( 90k ?) 180k ? ( 90k ?) * the values in parenthessis are for the apa3544. free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 3 symbol parameter rating unit r thja thermal resistance from junction to ambient in free air dip-8 sop-8 108 210 k/w r thjc thermal resistance from junction to case dip-8 sop-8 45 40 k/w electrical characteristics v in =0dbv, v cc =5v, t a =25 c, f=1khz, r l =32 ? (unless otherwise noted) apm3541/4 symbol parameter test condition min. typ. max. unit v dd supply voltage 3.0 5.0 6.0 v i q quiescent current vin= 0 vrms 3.5 5 ma imute mute current 200 a v tm mute terminal voltage 0.3 0.7 1.6 v ? g vcl differential channel voltage gain -0.5 0 0.5 db vin=1vrms,f= 1khz,rl=32 ? APA3541 -2 0 2 g vcl voltage gain vin=0.5vrms, f=1khz,rl=32 ? apa3544 4 6 8 db thd total harmonic channel distortion factor bw<80khz 0.03 0.1 % APA3541 50 55 p u1 rated output power1 rl=32 ? ,thd+n=0.1%,bw<8 0khz apa3544 75 80 mw APA3541 105 110 p u2 rated output power2 rl=16 ? ,thd+n=0.1%,bw<8 0khz apa3544 140 145 mw v no output noise voltage bw=20~20khz , vin=0vrms -93 -85 dbv APA3541 -90 -95 cs channel separation f=1khz apa3544 -65 -70 db att mute attenuation vin=1vrms,f=1khz,mute=l 65 70 db rr ripple rejection f rr =100hz,v rr =-20dbv 50 60 db thermal characteristics free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 4 test and application circuit + bias 57 mute 68 v dd 0db(6db) b a APA3541 (apa3544) 220 f 1 f 1 f 100 f 220 f 10 f 1 f 100k ? v ina v dd out b input b bias v inb v mute h : speaker action l : mute on out a mute v ss + input a 4 32 1 0db(6db) free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 5 typical characteristics figure 1 : supply voltage : v dd (v) quiescent current : i q (ma) figure 2 : supply voltage : v dd (v) bias dc voltage :v bias (v) 0 1 2 3 4 5 6 7 8 02467 5 3 1 mute : off mute : on r l =32 ? ? ? ? ? 0 1 2 3 4 5 02467 135 r l =32 ? ? ? ? ? figure 3 : mute control voltage : v tm (v) output voltage : v out (dbv) figure 4 : frequency :f (hz) voltage gain : g vc (db) 10 100k 100 1k 10k -12 +8 -10 -8 -6 -4 -2 +0 +2 +4 +6 APA3541 v dd =5v v in =0dbv -80 -70 -60 -50 -40 -30 -20 -10 0 10 0 0.4 0.8 1.2 1.6 2 v dd =5v v in =0dbv f =1 khz r l =32 ? ? ? ? ? free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 6 -40 +10 -30 -20 -10 +0 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 typical characteristics cont. figure 7 : output voltage : v out (dbv) total harmonic distortion : thd+n (%) figure 8 : output voltage : v out (dbv) total harmonic distortion : thd+n (%) -40 +10 -30 -20 -10 +0 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 f =10khz f =1khz , 100hz v dd = 3v r l =16 ? ? ? ? ? bw< 80khz -40 +10 -30 -20 -10 +0 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 v dd = 5v r l =16 ? ? ? ? ? bw< 80khz f =10khz f =1khz , 100hz figure 5 : output voltage : v out (dbv) total harmonic distortion : thd+n (%) f =1khz , 100hz f =10khz output voltage : v out (dbv) figure 6 : total harmonic distortion : thd+n (%) -40 +10 -30 -20 -10 +0 0.01 10 0.02 0.05 0.1 0.2 0.5 1 2 5 v dd = 3v r l =32 ? ? ? ? ? bw< 80khz f =10khz f =1khz , 100hz v dd = 5v r l =32 ? ? ? ? ? bw< 80khz free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 7 typical characteristics cont. figure 11 : supply voltage : v dd (v) ripple rejection : rr (db) f rr =100hz v rr =-20dbv -100 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 02467 5 3 1 figure 9 : frequency :f (hz) channel separation : cs (db) 100k 10 100 1k 10k -120 +0 -100 -80 -60 -40 -20 v dd =5v r l =32 ? ? ? ? ? figure 10 : frequency :f (hz) mute attenuationt : att(db) 10 100k 50 100 1k 10k 100 +0 -90 -80 -70 -60 -50 -40 -30 -20 -10 v dd =5v v in =0dbv r l =32 ? ? ? ? ? free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 8 application note input capacitor , ci in the typical application an input capacitor , ci , is required to allow the amplifier to bias the input signal to the proper dc level for optimum operation . in this case , the external capacitor ci and the internal re- sistance ri form a high-pass filter with the corner fre- quency determined in the follow equation: fc (highpass)= 1/ (2 rici) (1) the value of ci is important to consider as it directly affects the low frequency performance of the circuit. consider the APA3541 where ri is 180k ? and apa3544 is 90k ? internal fixed . equation is reconfigured as follow: ci= 1/(2 *180k ? *fc) for APA3541 ci= 1/(2 *90k ? *fc) for apa3544 (2) and the ceramic capacitor is recommanded. bias capacitor , cb as with any power amplifier , proper supply bypass- ing is critical for low noise performance and high power supply rejection . the capacitor location on both the bypass and power supply pins should be as close to the device as possible . the effect of a larger half supply bias capacitor is improved psrr due to increased half-supply stability . typical applications employ a 5v regulator with 10 f and a 0 . 1 f bias capacitors which aid in supply filtering . this does not eliminate the need for bypassing the supply nodes of the APA3541/4 . the selection of bias capacitors , especially cb , is thus dependent upon desired psrr requirements , click and pop per- formance . the capacitor is fed from a 95k ? source inside the amplifier . to keep the start-up pop as low as possible , the relationship shown in equation should be maintained . 1/(cb*95k ? ) 1/{ci*ri} (3) as an example , consider a circuit where cb is 4. 7 f, ci is 1 f and APA3541 ri is 180k ? inserting these values into the equation we get 2.24 5.55 which satisfies the rule . bias capacitor , cb , values of 2.2 f to 10 f ceramic or tantalum low-esr ca- pacitors are recommended for the best thd and noise performance . output coupling capacitor, cc in the typical single-supply se configuration , an out- put coupling capacitor (cc) is required to block the dc bias at the output of the amplifier thus preventing dc currents in the load . as with the input coupling capacitor , the output coupling capacitor and imped- ance of the load form a high-pass filter governed by equation . fc(highpass)= 1/(2 r l cc) (4) for example , a 220 f capacitor with an 32 ? speaker would attenuate low frequencies below 22hz . the main disadvantage , from a performance standpoint , is the load impedance is typically small , which drives the low-frequency corner higher degrading the bass response . large values of cc are required to pass low frequencies into the load . optimizing depop circuitry when the amplifier is in mute mode , both of the out- put stage and input bypass continues to be biased . and no pop noise will be heard during the transition out of mute mode . power supply decoupling, cs APA3541/4 is a high-performance cmos audio am- plifier that requires adequate power supply decoupling to ensure the output total harmonic distortion (thd) is as low as possible . power supply decoupling also prevents the oscillations causing by long lead length between the amplifier and the speaker . the optimum decoupling is achieved by using two different type capacitors that target on different type of noise on the power supply leads . for higher frequency tran- sients , spikes , or digital hash on the line , a good low equivalent-series-resistance (esr) ceramic capacitor, typically 0.1 f placed as close as possible to the device v dd lead works best . for filtering lower- frequency noise signals , a large aluminum electro- lytic capacitor of 10 f or greater placed near the audio power amplifier is recommended . free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 9 packaging information 1 d e1 a2 a1 a l e2 e 3 e 1 e e3 1 pdip-8 pin ( reference jedec registration ms-001) millimeters inches dim min. max. min. max. a 5.33 0.210 a1 0.38 0.015 a2 2.92 3.68 0.115 0.145 d 9.02 10.16 0.355 0.400 e1 2.54bsc 0.100bsc e2 0.36 0.56 0.014 0.022 e3 1.14 1.78 0.045 0.070 e 7.62 bsc 0.300 bsc e1 6.10 7.11 0.240 0.280 e3 10.92 0.430 l 2.92 3.81 0.115 0.150 15 free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 10 packaging information millimeters inches dim min. max. min. max. a 1.35 1.75 0.053 0.069 a1 0.10 0.25 0.004 0.010 d 4.80 5.00 0.189 0.197 e 3.80 4.00 0.150 0.157 h 5.80 6.20 0.228 0.244 l 0.40 1.27 0.016 0.050 e1 0.33 0.51 0.013 0.020 e2 1.27bsc 0.50bsc 18 8 h e e1 e2 0.015x45 d a a1 0.004max. 1 l sop-8 pin ( reference jedec registration ms-012) free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 11 physical specifications reflow condition (ir/convection or vpr reflow) pre-heat temperature 183 c peak temperature time temperature classification reflow profiles convection or ir/ convection vpr average ramp-up rate(183 c to peak) 3 c/second max. 10 c /second max. preheat temperature 125 25 c) 120 seconds max temperature maintained above 183 c 60 ? 150 seconds time within 5 c of actual peak temperature 10 ?20 seconds 60 seconds peak temperature range 220 +5/-0 c or 235 +5/-0 c 215-219 c or 235 +5/-0 c ramp-down rate 6 c /second max. 10 c /second max. time 25 c to peak temperature 6 minutes max. package reflow conditions pkg. thickness 2.5mm and all bgas pkg. thickness < 2.5mm and pkg. volume 350 mm3 pkg. thickness < 2.5mm and pkg. volume < 350mm3 convection 220 +5/-0 c convection 235 +5/-0 c vpr 215-219 c vpr 235 +5/-0 c ir/convection 220 +5/-0 c ir/convection 235 +5/-0 c terminal material solder-plated copper (solder material : 90/10 or 63/37 snpb) lead solderability meets eia specification rsi86-91, ansi/j-std-002 category 3. reference jedec standard j-std-020a april 1999 free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 12 test item method description solderability mil-std-883d-2003 245 c , 5 sec holt mil-std-883d-1005.7 1000 hrs bias @ 125 c pct jesd-22-b, a102 168 hrs, 100 % rh , 121 c tst mil-std-883d-1011.9 -65 c ~ 150 c , 200 cycles esd mil-std-883d-3015.7 vhbm > 2kv, vmm > 200v latch-up jesd 78 10ms , i tr > 100ma reliability test program carrier tape & reel dimensions a j b t2 t1 c t ao e w po p ko bo d1 d f p1 a pp lication a b c j t1 t2 w p e 330 162 +1.5 12.75+ 0.15 2 0.5 12.4 0.2 2 0.2 12 0. 3 8 0.1 1.75 0.1 f d d1 po p1 ao bo ko t sop- 8 5.5 1 1.55 +0.1 1.55+ 0.25 4.0 0.1 2.0 0.1 6.4 0.1 5.2 0. 1 2.1 0.1 0.3 0.013 free datasheet http:///
copyright ? anpec electronics corp. rev. b.1 -apr., 2003 APA3541/4 www.anpec.com.tw 13 cover tape dimensions anpec electronics corp. head office : 5f, no. 2 li-hsin road, sbip, hsin-chu, taiwan, r.o.c. tel : 886-3-5642000 fax : 886-3-5642050 taipei branch : 7f, no. 137, lane 235, pac chiao rd., hsin tien city, taipei hsien, taiwan, r. o. c. tel : 886-2-89191368 fax : 886-2-89191369 customer service application carrier width cover tape width devices per reel sop- 8 12 9.3 2500 free datasheet http:///

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